1. Field of the Invention
The present invention relates to a power converter using an operational amplifier, the power converter for providing a stable voltage supply to a plurality of transistors on an integrated circuit. More particularly, the present invention relates to a power converter made using 2.5 volt process transistors.
2. Description of the Related Art
FIG. 1 shows a typical circuit for a power converter for providing a voltage Vdd of 2.5 volts to components on an integrated circuit chip made using a 2.5 volt process. CMOS transistors made using such a 2.5 volt process typically have a limit of 2.7 volts for a gate to drain, or gate to source voltage before damage to the transistor gate oxide occurs. An typical 2.5 volt process transistor has a gate length of 0.25 microns or less and an oxide thickness of 60 Angstroms or less.
The circuit of FIG. 1 includes an operational amplifier (opamp) 100 which has a noninverting input (+) connected to a diode voltage reference (V.sub.DIOD), typically 1.2 volts, and an inverting input (-) connected to a resistor divider made up of resistors 102 and 104. Power is provided to the opamp 100 from an external supply pin (NV3EXT) providing a voltage in the range of 3.0 to 3.6 volts. The output of the opamp 100 then drives the gate of an NMOS transistor 110.
The voltage V.sub.DIOD can be provided from a conventional voltage reference, such as a band gap reference. Such a reference circuit included with the power converter of FIG. 1 forms a voltage regulator.
The transistor 110 has a drain connected to the NV3EXT supply and a source providing the supply voltage Vdd. The supply voltage Vdd is divided by the resistor divider 102,104 so that the voltage at node n matches the diode reference voltage V.sub.DIOD. Transistor 110 is a large device, and is connected to subsequent components in a source follower configuration. The large transistor 110 experiences a more significant change in its drain to source current (Ids) with a change in gate voltage than a smaller device.
In operation, when a load is placed on the node n2, which pulls down Vdd, the inverting (-) input of the opamp 100 will drop, and the opamp 100 output voltage will increase and turn on transistor 110 to provide more current to node n2 to raise Vdd back to the desired level.
A large capacitor 112 is connected to the gate of transistor 110 to decouple the gate of transistor 110 from its source. With a significant drop in the source voltage of transistor 110, without capacitor 112, the gate will tend to be pulled down with the source until the opamp 100 has had time to increase the gate voltage to pull the source of transistor 110 back up. The capacitor 112 limits the speed that the gate of transistor 110 can be pulled down and provides stability to the circuit of FIG. 1.
FIG. 2 illustrates how the voltage Vdd at node n2 and the drain to source current of transistor 110 are affected when a load is placed on node n2. Initially the load is assumed to draw 5 milliamps, and the voltage Vdd remains stable at 2.5 volts. When the load is applied to node n2 which is assumed to draw 500 ma, the current Ids of transistor 110 immediately increases to provide the 500 milliamps, and the voltage Vdd initially reduces to approximately 2.2 volts before the opamp 100 can react to increase the gate voltage to transistor 110. Once the opamp 100 increases the gate voltage to transistor 110, the voltage Vdd increases back from 2.2 volts to 2.5 volts. Similarly, when the 500 ma load is removed, the current Ids will immediately return to 5 ma, but the gate voltage on transistor 110 will not be reduced for a short period of time by the opamp 100 so the voltage Vdd initially increases to approximately 2.8 volts. Once the opamp 100 decreases the gate voltage to transistor 110, the voltage Vdd decreases back from 2.8 volts to 2.5 volts. With Vdd increasing to 2.8 volts and a maximum of 2.7 volts between the gate and source, or gate and drain of transistor 110 damage to the gate oxide of transistor 110 can occur.
In addition to transistor 110, it is desirable for the remaining transistors of the power converter to operate with a maximum gate to source, or gate to drain voltage less than 2.7 volts. In particular it would be desirable to have a power converter with circuitry for the opamp 100 which uses 2.5 volt process transistors and delivers a 3.3 volt signal from a lead pin to other circuitry without damaging transistor gate oxide.